Wire Bonders' Speak

Given the consumer electronic product industry's trend toward decreased size, increased portability and convergence of function, electronics manufacturers are confronted with a device integration challenge. Two solutions that have emerged from this issue are system-on-a-chip (SoC) and system-in-a-package (SiP) technologies. The International Technology Roadmap for Semiconductors (ITRS) has identified these approaches as two of the most attractive approaches for 3D packaging. These solutions are being used in a variety of industries, including the computer, consumer, aerospace, military, and medical electronic industries. SoC's and SiP's can be accomplished with a wire bonder or ball bonder.

The first solution, system-on-a-chip (SoC) technology, was designed for applications that require components implemented into a single integrated circuit, such as those applications requiring the lowest power, highest clock rates and lowest unit costs. This single chip can contain a variety of functions including digital, analog, mixed-signal, and RF. The benefits of this technology include a smaller footprint and space requirements, higher performance due to the increased number of circuits on the chip, greater system reliability, lower power requirements, and a potentially lower cost for the end user.

The second solution, system-in-a-package (SiP) technology, was designed for multiple advanced packaging applications that require a fully functional, highly specialized module that can be easily integrated into a system. A SiP includes multiple integrated circuits enclosed in a single package or module. The dies containing the integrated circuits may be stacked vertically on a substrate and connected by wires bonded to the package. Alternative, the dies can be connected through flip chip technology, in which solder or gold ball bumps are used to join stacked chips together. Localizing functionality to a SiP module reduces the complexity and cost of the system board, and removes this design burden from the system designer.

So which technology is better?

The choice between SiP and SoC often creates a debate among RF designers because both approaches provide different advantages for different end-market applications. SiPs allow for relatively easy hetero-integration of analog and RF functionalities with digital CMOS, with possible cost and performance benefits. However, proper system partitioning at the design stage is key to obtaining the maximum value from a SiP. SoCs provide the lowest manufacturing cost, but design costs are often higher and time-to-market is generally slower. Depending on the anticipated unit volumes and target ASPs for the required system, either approach may be desirable.