Optical fiber technologies, used most notably in the telecommunication industry, are also permeating to other industries such as to the medical, cable, defense, and engineering industries. These technologies require optoelectronic packaging, which is a sequence of technologies which involves connecting, protecting, and manufacturing the device. Many industries such as the telecommunication industry are moving from electrical interconnections to optical interconnections because electrical interconnections are limited in speed and density.
Manual assembly processes used to be the norm, but the industry has largely shifted to semiautomatic or automatic assembly. However, fully automatic assembly provides the largest cost savings when coupled with large scale production. It also decreases the time to market. Currently, the package accounts for 60-80% of the manufacturing cost of an optoelectronic device.
The optoelectronic packaging process is challenging and requires a highly controlled process, material purity, eutectic heat transfer processes, and precision component alignment. Consider a generic assembly process in fiber optic device assembly:
First, a substrate crystal is chosen such that mirror facets can be cleaved. In the chip fabrication step, grooves about 50 microns deep are fabricated photolithographically with a spacing of about 200-300 microns; they are then polished about 100 micron thickness. The wafer is then cleaved perpendicularly into diode arrays or bars. This requires special care such that defects aren't introduced. Once the cleaving is accomplished, each diode is tested, and only good diodes are selected. Next, the mirror facets are protected by a dielectric film such as SiO2, Al2O3 or Si3N4, which is deposited by RF sputtering or chemical vapor deposition (CVD). This is done to both suppress the oxidation of the facets, which causes long-term degradation, and to reduce the surface recombination velocity, which is an important parameter for catastrophic failure (higher surface recombination velocity lowers the critical degradation level). The diode arrays are then divided into chips by applying stress along the grooves; again, only good diodes are selected.
The next step in this process is to use wire bonding and die bonding techniques on singulated diodes to mount the device on a subassembly. This assembly process can be accomplished in several ways, depending on the requirements of the end product, and care must be taken not to introduce thermal to mechanical stress during the process. The following chart describes the different processes available.
To minimize stress, this assembly process should be automated for consistent and repeatable results. Finally, the bonds are aligned and the diode is tested and labeled.
An example of the end product of this process is shown below. This particular photo is of a laser chip attached with a Au-Sn perform, accomplished on the Model 3500-III Die Bonder.
